The present disclosure relates to semiconductor device fabrication. More particularly, the present disclosure relates to the fabrication of semiconductor devices using a sidewall image transfer (SIT) process.
Sidewall image transfer (SIT) is now commonly used to manufacture fins having pitches as small as 40 nm. SIT involves creating relief patterns, called mandrels and depositing sidewall spacers onto the mandrels. The mandrels are subsequently removed, thereby leaving behind sidewall spacers which can be used as an etch mask to transfer the pattern in the underlying stack. However, due to the continued trend to reduce feature sizes, the conventional SIT process faces some difficulties. For example, and because the spacing between the sidewall spacers is dependent upon the critical dimensions of the mandrels, SIT is very sensitive to mandrel uniformity and mandrel critical dimensions. Variations in the critical dimensions of mandrels increase as photolithography is pushed near its resolution limits to define the mandrels. As a result, the sidewall spacers can have a pitch that deviates from the pitch that is desired, thereby degrading the uniformity and ultimate quality of the integrated circuit patterned using the sidewall spacers. Moreover, closely spaced sidewall spacers also make removing unwanted sacrificial fins defined by SIT more difficult. As such, there remains a need to develop fabrication methods to overcome these difficulties.